Design Verification Engineer (Senior and Above)
Đà Nang, Da Nang City, Vietnam
Quest Global
Thỏa thuận
Job description
Job Requirements
At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.
We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.
Work Experience
At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.
- Key Responsibilities
- Responsible for Verification from Verification Strategy, Testbench Development, Verification Item List to Simulation, Coverage Analysis
- Verification Strategy/Test Plan Development: Create Strategy/Plan based on Design specification/Micro Architecture
- Testbench Development, Simulation/Debugging to identify and resolve any issues/failures of the design
- Work closely with Synthesis/PD teams to address any defects in Netlist, Timing SDF and ensure specifications are met
- Coverage analysis to detect uncovered areas that need further testing
- Documentation and reporting for progress tracking, detailed feedback to design teams, verification result
We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.
Work Experience
- Good Experience in all level verification (SoC/SS/IP)
- Be able to handle Block/IP verification independently
- Effective use of Verification methodologies and simulation/debugging tools
- Strong understanding of AMBA bus protocols
- Good Experience in analyzing and improving coverage
- Be able to execute Gate Level Simulation, X-propagation solving, timing annotation
- Mentor for junior members